1. Field of the Invention
The present invention relates to a semiconductor storage device including a high voltage regulator circuit used in a storage device that needs a high voltage when data in an electrically rewritable memory is erased or is written.
2. Description of the Related Art
EEPROM (Electrically Erasable Programmable Read Only Memory) and flash memory are widely used in various program storage or data storage in commercialized equipment and industrial equipment. The storage unit in EEPROM or flash memory generates tunnel current or thermal electron, by using high voltage (e.g. 15V), to inject electron on the floating gate or emit electron of the floating gate. As a result, the threshold value of the storage unit changes to rewrite data (referring to Patent documents 1 and 2).
FIG. 8 is a block diagram showing a conventional semiconductor storage device. The conventional semiconductor storage device includes a high voltage input/output circuit 61, a high voltage generating circuit 62, a high voltage regulator circuit 90, a X decoder 71, a Y decoder 70 and a storage unit array 72. The storage unit array 72 includes a plurality of storage units arranged in two dimensions. The storage unit array 72 is connected to: the X decoder 71 for inputting address signal of high bit address line and for selecting word line of the storage unit array 72; the Y decoder 70 for inputting address signal of low bit address line and for selecting read-out or rewrite-into fixed storage unit within storage unit connected to a word line; and the Y gate 73 for reading data of the selected storage unit and outputting to data line or transmitting data signal of the data line to the storage unit array 72.
Moreover, the semiconductor storage device includes: the high voltage generating circuit 62 for generating a high voltage VPP when rewriting data and outputting to the X decoder 71 and the Y decoder 70; and the high voltage regulator circuit 90 for controlling the high voltage form the high voltage generating circuit 62 to be a fixed voltage. When data is rewritten into the storage unit array, the high voltage generating circuit 62 generates the high voltage needed to erase/write, and the high voltage is applied to the storage unit of the storage unit array 72 through the X decoder 71 and the Y decoder 70.
During the period of erasing/writing data of the storage unit, the storage unit of the storage unit array 72 is applied with the fixed voltage on a fixed period. By the above operation, the storage unit is erased/written. However, if the applied voltage is higher than the rated voltage, the transistor of the storage unit is applied with the high voltage and will be damaged. On the other hand, if the applied voltage is lower than the rated voltage, the threshold voltage of the transistor of the storage unit can not be changed sufficiently.
Therefore, the high voltage regulator circuit 90 is mounted to maintain the applied high voltage to be the fixed voltage. The high voltage regulator circuit 90 includes a plurality of FETs (Field effect Transistor) 63, 65, 66, 67, a zener diode 64, a constant current source 68 and a buffer 69. The withstand voltage of the zener diode 64 is selected to be the same level as the high voltage for rewriting data used in the storage unit.
The EN (enable) signal is input to the gate of the FET 65 so as to operate the high voltage regulator circuit 90. On the other hand, if the output voltage VPP from the high voltage generating circuit 62 changes and is higher than a reference value, the zener diode 64 turns on and a current flows through the FET 63, the zener diode 64, the FET 65 and the FET 66. A bias voltage is applied to the FET 67, thus the FET 67 turns on and a current flows through the FET 67. Therefore, the input side of the buffer 69 turns to low voltage level, and the output side of the buffer 69 turns to low voltage level, the high voltage generating EN (enable) signal becomes low voltage level so as to stop the operation of the high voltage generating circuit 62.
During the period of stopping the operation of the high voltage generating circuit 62, since the current flows through the zener diode 64, the high voltage VPP is decreased. When the high voltage VPP is lower than the withstand voltage of the zener diode 64, no current flows through the zener diode 64 and the output side of the buffer 69 turns to high voltage level so that the high voltage generating circuit 62 operates again. The above method is used to maintain the high voltage to be the fixed voltage.
Additionally, in the die sort test for the semiconductor storage device on die stage, the voltage level of various output voltage from the high voltage generating circuit used in the semiconductor storage device is tested whether the voltage level is the same as a predetermined value and whether the voltage level can perform the basic writing or erasing operation. To proceed the voltage test on die stage, a plurality of solder pads are mounted to connect external terminal. One of the solder pads is the testing solder pad shown in FIG. 8.    Patent document 1: Japanese Patent Publication No. 2007-234776.    Patent document 2: WO 2005/062311.